mirror of
https://github.com/Ed94/Odin.git
synced 2026-07-29 10:50:05 +00:00
Improve termination rules checking for missing return; Make diverging procedure -> ! be terminators
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@@ -280,7 +280,6 @@ stack_allocator_proc :: proc(allocator_data: rawptr, mode: Allocator_Mode,
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if !(start <= curr_addr && curr_addr < end) {
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panic("Out of bounds memory address passed to stack allocator (free)");
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return nil;
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}
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if curr_addr >= start+uintptr(s.curr_offset) {
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@@ -293,7 +292,6 @@ stack_allocator_proc :: proc(allocator_data: rawptr, mode: Allocator_Mode,
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if old_offset != int(header.prev_offset) {
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panic("Out of order stack allocator free");
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return nil;
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}
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s.curr_offset = int(old_offset);
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@@ -317,7 +315,6 @@ stack_allocator_proc :: proc(allocator_data: rawptr, mode: Allocator_Mode,
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curr_addr := uintptr(old_memory);
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if !(start <= curr_addr && curr_addr < end) {
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panic("Out of bounds memory address passed to stack allocator (resize)");
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return nil;
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}
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if curr_addr >= start+uintptr(s.curr_offset) {
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@@ -426,7 +423,6 @@ small_stack_allocator_proc :: proc(allocator_data: rawptr, mode: Allocator_Mode,
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if !(start <= curr_addr && curr_addr < end) {
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panic("Out of bounds memory address passed to stack allocator (free)");
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return nil;
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}
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if curr_addr >= start+uintptr(s.offset) {
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@@ -455,7 +451,6 @@ small_stack_allocator_proc :: proc(allocator_data: rawptr, mode: Allocator_Mode,
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curr_addr := uintptr(old_memory);
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if !(start <= curr_addr && curr_addr < end) {
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panic("Out of bounds memory address passed to stack allocator (resize)");
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return nil;
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}
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if curr_addr >= start+uintptr(s.offset) {
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@@ -511,11 +506,10 @@ dynamic_pool_allocator_proc :: proc(allocator_data: rawptr, mode: Allocator_Mode
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case .Alloc:
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return dynamic_pool_alloc(pool, size);
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case .Free:
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panic("Allocator_Mode.Free is not supported for a pool");
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//
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case .Free_All:
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dynamic_pool_free_all(pool);
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case .Resize:
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panic("Allocator_Mode.Resize is not supported for a pool");
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if old_size >= size {
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return old_memory;
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}
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@@ -53,7 +53,6 @@ atomic_load :: inline proc(dst: ^$T, $order: Ordering) -> T {
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case .Acquire_Release: panic("there is no such thing as an acquire/release load");
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}
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panic("unknown order");
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return T{};
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}
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atomic_swap :: inline proc(dst: ^$T, val: T, $order: Ordering) -> T {
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@@ -65,7 +64,6 @@ atomic_swap :: inline proc(dst: ^$T, val: T, $order: Ordering) -> T {
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case .Sequentially_Consistent: return intrinsics.atomic_xchg(dst, val);
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}
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panic("unknown order");
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return T{};
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}
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atomic_compare_exchange :: inline proc(dst: ^$T, old, new: T, $success, $failure: Ordering) -> (val: T, ok: bool) {
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@@ -146,7 +144,6 @@ atomic_add :: inline proc(dst: ^$T, val: T, $order: Ordering) -> T {
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case .Sequentially_Consistent: return intrinsics.atomic_add(dst, val);
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}
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panic("unknown order");
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return T{};
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}
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atomic_sub :: inline proc(dst: ^$T, val: T, $order: Ordering) -> T {
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@@ -158,7 +155,6 @@ atomic_sub :: inline proc(dst: ^$T, val: T, $order: Ordering) -> T {
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case .Sequentially_Consistent: return intrinsics.atomic_sub(dst, val);
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}
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panic("unknown order");
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return T{};
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}
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atomic_and :: inline proc(dst: ^$T, val: T, $order: Ordering) -> T {
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@@ -170,7 +166,6 @@ atomic_and :: inline proc(dst: ^$T, val: T, $order: Ordering) -> T {
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case .Sequentially_Consistent: return intrinsics.atomic_and(dst, val);
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}
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panic("unknown order");
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return T{};
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}
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atomic_nand :: inline proc(dst: ^$T, val: T, $order: Ordering) -> T {
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@@ -182,7 +177,6 @@ atomic_nand :: inline proc(dst: ^$T, val: T, $order: Ordering) -> T {
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case .Sequentially_Consistent: return intrinsics.atomic_nand(dst, val);
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}
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panic("unknown order");
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return T{};
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}
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atomic_or :: inline proc(dst: ^$T, val: T, $order: Ordering) -> T {
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@@ -194,7 +188,6 @@ atomic_or :: inline proc(dst: ^$T, val: T, $order: Ordering) -> T {
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case .Sequentially_Consistent: return intrinsics.atomic_or(dst, val);
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}
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panic("unknown order");
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return T{};
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}
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atomic_xor :: inline proc(dst: ^$T, val: T, $order: Ordering) -> T {
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@@ -206,6 +199,5 @@ atomic_xor :: inline proc(dst: ^$T, val: T, $order: Ordering) -> T {
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case .Sequentially_Consistent: return intrinsics.atomic_xor(dst, val);
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}
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panic("unknown order");
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return T{};
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}
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