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Fix shifting limits and LLVM code gen bug relating to shifts

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gingerBill
2021-03-29 23:15:31 +01:00
parent 6fb0868517
commit 439e2c9242
3 changed files with 17 additions and 13 deletions
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src/ir.cpp
+7 -6
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@@ -4639,13 +4639,13 @@ handle_op:
irValue *bits = right; irValue *bits = right;
irValue *max = ir_value_constant(type, exact_value_i64(8*type_size_of(type))); irValue *bit_size = ir_value_constant(type, exact_value_i64(8*type_size_of(type)));
irValue *less_equal_width = ir_emit(proc, ir_instr_binary_op(proc, Token_Lt, bits, max, t_llvm_bool)); irValue *width_test = ir_emit(proc, ir_instr_binary_op(proc, Token_Lt, bits, bit_size, t_llvm_bool));
irValue *zero = ir_value_constant(type, exact_value_i64(0)); irValue *zero = ir_value_constant(type, exact_value_i64(0));
irValue *res = ir_emit(proc, ir_instr_binary_op(proc, op, left, bits, type)); irValue *res = ir_emit(proc, ir_instr_binary_op(proc, op, left, bits, type));
return ir_emit_select(proc, less_equal_width, res, zero); return ir_emit_select(proc, width_test, res, zero);
} }
case Token_Shr: case Token_Shr:
{ {
@@ -4655,10 +4655,11 @@ handle_op:
irValue *bits = right; irValue *bits = right;
irValue *max = ir_value_constant(type, exact_value_i64(8*type_size_of(type))); irValue *bit_size = ir_value_constant(type, exact_value_i64(8*type_size_of(type)));
irValue *less_equal_width = ir_emit(proc, ir_instr_binary_op(proc, Token_Lt, bits, max, t_llvm_bool)); irValue *max = ir_value_constant(type, exact_value_i64(8*type_size_of(type)-1));
irValue *width_test = ir_emit(proc, ir_instr_binary_op(proc, Token_Lt, bits, bit_size, t_llvm_bool));
bits = ir_emit_select(proc, less_equal_width, bits, max); bits = ir_emit_select(proc, width_test, bits, max);
return ir_emit(proc, ir_instr_binary_op(proc, op, left, bits, type)); return ir_emit(proc, ir_instr_binary_op(proc, op, left, bits, type));
} }
src/llvm_backend.cpp
+8 -6
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@@ -6599,13 +6599,14 @@ handle_op:
LLVMValueRef lhsval = lhs.value; LLVMValueRef lhsval = lhs.value;
LLVMValueRef bits = rhs.value; LLVMValueRef bits = rhs.value;
LLVMValueRef max = LLVMConstInt(lb_type(p->module, rhs.type), 8*type_size_of(lhs.type), false); LLVMValueRef bit_size = LLVMConstInt(lb_type(p->module, rhs.type), 8*type_size_of(lhs.type), false);
LLVMValueRef max = LLVMConstInt(lb_type(p->module, rhs.type), 8*type_size_of(lhs.type)-1, false);
LLVMValueRef less_equal_width = LLVMBuildICmp(p->builder, LLVMIntULT, bits, max, ""); LLVMValueRef width_test = LLVMBuildICmp(p->builder, LLVMIntULT, bits, bit_size, "");
res.value = LLVMBuildShl(p->builder, lhsval, bits, ""); res.value = LLVMBuildShl(p->builder, lhsval, bits, "");
LLVMValueRef zero = LLVMConstNull(lb_type(p->module, lhs.type)); LLVMValueRef zero = LLVMConstNull(lb_type(p->module, lhs.type));
res.value = LLVMBuildSelect(p->builder, less_equal_width, res.value, zero, ""); res.value = LLVMBuildSelect(p->builder, width_test, res.value, zero, "");
return res; return res;
} }
case Token_Shr: case Token_Shr:
@@ -6615,11 +6616,12 @@ handle_op:
LLVMValueRef bits = rhs.value; LLVMValueRef bits = rhs.value;
bool is_unsigned = is_type_unsigned(type); bool is_unsigned = is_type_unsigned(type);
LLVMValueRef max = LLVMConstInt(lb_type(p->module, rhs.type), 8*type_size_of(lhs.type), false); LLVMValueRef bit_size = LLVMConstInt(lb_type(p->module, rhs.type), 8*type_size_of(lhs.type), false);
LLVMValueRef max = LLVMConstInt(lb_type(p->module, rhs.type), 8*type_size_of(lhs.type)-1, false);
LLVMValueRef less_equal_width = LLVMBuildICmp(p->builder, LLVMIntULT, bits, max, ""); LLVMValueRef width_test = LLVMBuildICmp(p->builder, LLVMIntULT, bits, bit_size, "");
bits = LLVMBuildSelect(p->builder, less_equal_width, bits, max, ""); bits = LLVMBuildSelect(p->builder, width_test, bits, max, "");
if (is_unsigned) { if (is_unsigned) {
res.value = LLVMBuildLShr(p->builder, lhs.value, bits, ""); res.value = LLVMBuildLShr(p->builder, lhs.value, bits, "");
} else { } else {
src/llvm_backend_opt.cpp
+2 -1
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@@ -8,8 +8,9 @@ void lb_populate_function_pass_manager(LLVMPassManagerRef fpm, bool ignore_memcp
} }
LLVMAddPromoteMemoryToRegisterPass(fpm); LLVMAddPromoteMemoryToRegisterPass(fpm);
LLVMAddMergedLoadStoreMotionPass(fpm); LLVMAddMergedLoadStoreMotionPass(fpm);
LLVMAddConstantPropagationPass(fpm);
LLVMAddEarlyCSEPass(fpm); LLVMAddEarlyCSEPass(fpm);
// LLVMAddEarlyCSEMemSSAPass(fpm);
LLVMAddConstantPropagationPass(fpm); LLVMAddConstantPropagationPass(fpm);
LLVMAddMergedLoadStoreMotionPass(fpm); LLVMAddMergedLoadStoreMotionPass(fpm);
LLVMAddPromoteMemoryToRegisterPass(fpm); LLVMAddPromoteMemoryToRegisterPass(fpm);