From 7a367c9c08639ded09b342714e02bdbc82ecb604 Mon Sep 17 00:00:00 2001
From: Feoramund <161657516+Feoramund@users.noreply.github.com>
Date: Tue, 6 Aug 2024 14:49:56 -0400
Subject: [PATCH 1/2] Fix documented names of a few SIMD procedures

---
 base/intrinsics/intrinsics.odin | 8 ++++----
 1 file changed, 4 insertions(+), 4 deletions(-)

diff --git a/base/intrinsics/intrinsics.odin b/base/intrinsics/intrinsics.odin
index c78559f3f..c70c63bb3 100644
--- a/base/intrinsics/intrinsics.odin
+++ b/base/intrinsics/intrinsics.odin
@@ -303,11 +303,11 @@ simd_nearest :: proc(a: #simd[N]any_float) -> #simd[N]any_float ---
 
 simd_to_bits :: proc(v: #simd[N]T) -> #simd[N]Integer where size_of(T) == size_of(Integer), type_is_unsigned(Integer) ---
 
-// equivalent a swizzle with descending indices, e.g. reserve(a, 3, 2, 1, 0)
-simd_reverse :: proc(a: #simd[N]T) -> #simd[N]T ---
+// equivalent to a swizzle with descending indices, e.g. reserve(a, 3, 2, 1, 0)
+simd_lanes_reverse :: proc(a: #simd[N]T) -> #simd[N]T ---
 
-simd_rotate_left  :: proc(a: #simd[N]T, $offset: int) -> #simd[N]T ---
-simd_rotate_right :: proc(a: #simd[N]T, $offset: int) -> #simd[N]T ---
+simd_lanes_rotate_left  :: proc(a: #simd[N]T, $offset: int) -> #simd[N]T ---
+simd_lanes_rotate_right :: proc(a: #simd[N]T, $offset: int) -> #simd[N]T ---
 
 // Checks if the current target supports the given target features.
 //

From e27a424f4d88a0409e6492ab167dbe5a82b9e3ac Mon Sep 17 00:00:00 2001
From: Feoramund <161657516+Feoramund@users.noreply.github.com>
Date: Tue, 6 Aug 2024 14:50:34 -0400
Subject: [PATCH 2/2] Swap `reduce_any` and `reduce_all`

`llvm.vector.reduce.or` will return true if any lane is true.
`llvm.vector.reduce.and` will return true if all lanes are true.
---
 src/llvm_backend_proc.cpp | 4 ++--
 1 file changed, 2 insertions(+), 2 deletions(-)

diff --git a/src/llvm_backend_proc.cpp b/src/llvm_backend_proc.cpp
index ceaeb1aca..ee3ed1995 100644
--- a/src/llvm_backend_proc.cpp
+++ b/src/llvm_backend_proc.cpp
@@ -1532,8 +1532,8 @@ gb_internal lbValue lb_build_builtin_simd_proc(lbProcedure *p, Ast *expr, TypeAn
 		{
 			char const *name = nullptr;
 			switch (builtin_id) {
-			case BuiltinProc_simd_reduce_any: name = "llvm.vector.reduce.and"; break;
-			case BuiltinProc_simd_reduce_all: name = "llvm.vector.reduce.or";  break;
+			case BuiltinProc_simd_reduce_any: name = "llvm.vector.reduce.or";  break;
+			case BuiltinProc_simd_reduce_all: name = "llvm.vector.reduce.and"; break;
 			}
 
 			LLVMTypeRef types[1] = { lb_type(p->module, arg0.type) };