ed/Odin
1
0
Fork 0
mirror of https://github.com/Ed94/Odin.git synced 2026-08-01 04:10:07 +00:00
Code Issues Packages Projects Releases Wiki Activity

riscv compiler support

Browse Source
This commit is contained in:
Laytan
2024-09-01 21:42:47 +02:00
parent 722b638e2c
commit 28c643d23f
5 changed files with 34 additions and 4 deletions
Download Patch File Download Diff File Expand all files Collapse all files
src/gb/gb.h
+15 -2
View File
@@ -39,7 +39,7 @@ extern "C" {
#endif
#endif
#if defined(_WIN64) || defined(__x86_64__) || defined(_M_X64) || defined(__64BIT__) || defined(__powerpc64__) || defined(__ppc64__) || defined(__aarch64__)
#if defined(_WIN64) || defined(__x86_64__) || defined(_M_X64) || defined(__64BIT__) || defined(__powerpc64__) || defined(__ppc64__) || defined(__aarch64__) || (defined(__riscv) && __riscv_xlen == 64)
#ifndef GB_ARCH_64_BIT
#define GB_ARCH_64_BIT 1
#endif
@@ -144,6 +144,13 @@ extern "C" {
#define GB_CACHE_LINE_SIZE 64
#endif
#elif defined(__riscv)
#ifndef GB_CPU_RISCV
#define GB_CPU_RISCV 1
#endif
#ifndef GB_CACHE_LINE_SIZE
#define GB_CACHE_LINE_SIZE 64
#endif
#else
#error Unknown CPU Type
#endif
@@ -2562,7 +2569,7 @@ gb_inline void *gb_memcopy(void *dest, void const *source, isize n) {
void *dest_copy = dest;
__asm__ __volatile__("rep movsb" : "+D"(dest_copy), "+S"(source), "+c"(n) : : "memory");
#elif defined(GB_CPU_ARM)
#elif defined(GB_CPU_ARM) || defined(GB_CPU_RISCV)
u8 *s = cast(u8 *)source;
u8 *d = cast(u8 *)dest;
for (isize i = 0; i < n; i++) {
@@ -6267,6 +6274,12 @@ gb_no_inline isize gb_snprintf_va(char *text, isize max_len, char const *fmt, va
asm volatile("mrs %0, cntvct_el0" : "=r"(virtual_timer_value));
return virtual_timer_value;
}
#elif defined(__riscv)
gb_inline u64 gb_rdtsc(void) {
u64 result = 0;
__asm__ volatile("rdcycle %0" : "=r"(result));
return result;
}
#else
#warning "gb_rdtsc not supported"
gb_inline u64 gb_rdtsc(void) { return 0; }