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intrinsics.simd_shuffle
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@@ -758,6 +758,64 @@ bool check_builtin_simd_operation(CheckerContext *c, Operand *operand, Ast *call
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}
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case BuiltinProc_simd_shuffle:
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{
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Operand x = {};
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Operand y = {};
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Operand z = {};
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check_expr(c, &x, ce->args[0]); if (x.mode == Addressing_Invalid) { return false; }
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check_expr_with_type_hint(c, &y, ce->args[1], x.type); if (y.mode == Addressing_Invalid) { return false; }
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convert_to_typed(c, &y, x.type);
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if (!is_type_simd_vector(x.type)) {
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error(x.expr, "'%.*s' expected a simd vector type", LIT(builtin_name));
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return false;
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}
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if (!is_type_simd_vector(y.type)) {
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error(y.expr, "'%.*s' expected a simd vector type", LIT(builtin_name));
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return false;
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}
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if (!are_types_identical(x.type, y.type)) {
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gbString xs = type_to_string(x.type);
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gbString ys = type_to_string(y.type);
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error(x.expr, "'%.*s' expected 2 arguments of the same type, got '%s' vs '%s'", LIT(builtin_name), xs, ys);
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gb_string_free(ys);
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gb_string_free(xs);
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return false;
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}
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Type *elem = base_array_type(x.type);
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check_expr(c, &z, ce->args[2]); if (z.mode == Addressing_Invalid) { return false; }
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Type *z_elem = base_array_type(z.type);
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if (!is_type_simd_vector(z.type) || !are_types_identical(z_elem, t_u32)) {
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gbString zstr = type_to_string(z.type);
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error(z.expr, "'%.*s' expected a simd vector type with an element of type 'u32', got '%s'", LIT(builtin_name), zstr);
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gb_string_free(zstr);
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return false;
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}
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i64 x_count = x.type->SimdVector.count;
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i64 z_count = z.type->SimdVector.count;
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if (!is_power_of_two(z_count)) {
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gbString zstr = type_to_string(z.type);
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error(z.expr, "'%.*s' expected a simd vector type with a power of two length, got '%s'", LIT(builtin_name), zstr);
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gb_string_free(zstr);
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return false;
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}
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if (z_count > x_count) {
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gbString zstr = type_to_string(z.type);
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error(z.expr, "'%.*s' expected a simd vector type excepts the sum of the two input vectors, got '%s'", LIT(builtin_name), zstr);
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gb_string_free(zstr);
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return false;
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}
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operand->mode = Addressing_Value;
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operand->type = alloc_type_simd_vector(z_count, elem);
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return true;
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}
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// case BuiltinProc_simd_rotate_left:
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// {
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// Operand x = {};
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@@ -3131,6 +3189,12 @@ bool check_builtin_procedure(CheckerContext *c, Operand *operand, Ast *call, i32
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operand->mode = Addressing_Type;
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operand->type = alloc_type_simd_vector(count, elem);
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if (is_arch_wasm()) {
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if (type_size_of(operand->type) != 16) {
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error(x.expr, "wasm based targets are limited to 128-bit types");
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}
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}
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break;
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}
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