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table lookup intrinsic
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@@ -2440,6 +2440,57 @@ Graphically, the operation looks as follows. The `t` and `f` represent the
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*/
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select :: intrinsics.simd_select
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/*
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Runtime Equivalent to Shuffle.
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Performs element-wise table lookups using runtime indices.
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Each element in the indices vector selects an element from the table vector.
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The indices are automatically masked to prevent out-of-bounds access.
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This operation is hardware-accelerated on most platforms when using 8-bit
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integer vectors. For other element types or unsupported vector sizes, it
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falls back to software emulation.
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Inputs:
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- `table`: The lookup table vector (should be power-of-2 size for correct masking).
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- `indices`: The indices vector (automatically masked to valid range).
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Returns:
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- A vector where `result[i] = table[indices[i] & (table_size-1)]`.
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Operation:
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for i in 0 ..< len(indices) {
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masked_index := indices[i] & (len(table) - 1)
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result[i] = table[masked_index]
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}
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return result
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Implementation:
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| Platform | Lane Size | Implementation |
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|-------------|-------------------------------------------|---------------------|
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| x86-64 | pshufb (16B), vpshufb (32B), AVX512 (64B) | Single vector |
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| ARM64 | tbl1 (16B), tbl2 (32B), tbl4 (64B) | Automatic splitting |
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| ARM32 | vtbl1 (8B), vtbl2 (16B), vtbl4 (32B) | Automatic splitting |
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| WebAssembly | i8x16.swizzle (16B), Emulation (>16B) | Mixed |
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| Other | Emulation | Software |
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Example:
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import "core:simd"
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import "core:fmt"
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table_lookup_example :: proc() {
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table := simd.u8x16{0, 1, 2, 3, 4, 5, 6, 7, 8, 9, 10, 11, 12, 13, 14, 15}
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indices := simd.u8x16{15, 0, 1, 2, 3, 4, 5, 6, 7, 8, 9, 10, 11, 12, 13, 14}
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result := simd.table_lookup(table, indices)
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fmt.println(result) // Expected: {15, 0, 1, 2, 3, 4, 5, 6, 7, 8, 9, 10, 11, 12, 13, 14}
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}
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*/
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table_lookup :: intrinsics.simd_table_lookup
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/*
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Compute the square root of each lane in a SIMD vector.
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*/
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